Four-Quadrant Weak Inversion Analog Multiplier in the 180nm Technology for Biomedical Applications

Seyed Alireza Khoshnevis, Farzad Shahabi, Ramin Ghadami Talkhouncheh

Abstract


In this paper, a current-mode four-quadrant analog multiplier circuit is proposed that utilizes MOS translinear principle. The parameters of TSMC 0.18µm technology are used to design the proposed multiplier that employs CMOS transistors operating in weak inversion region. The full combination of H-spice simulation, Monte Carlo simulation, L-edit post-layout simulation, and corner cases analysis are performed to prove its great merits of; low power consumption (1.5µW), low supply voltage (0.8V), body effect immunity, wide input range (±200nA), the bandwidth of 4.7 MHz, THD value lower than 2.8%, and the well-resistance of the proposed block against PVT (Technology Process, Supply Voltage, Temperature) non-idealises. The proposed architecture is compared with other current-mode week inversion multipliers indicating its noticeable superiorities over other ones particularly in FOM (Figure of Merits), consumed power and input range.


Keywords


Analog Multiplier, MOS Translinear, Monte Carlo, Weak Inversion

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References


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